School of Information Science and Engineering, Lanzhou University.

NO. 222, south of Tianshui road, Lanzhou, China.

Email: heap@lzu.edu.cn

Phone: +86 13893178725

 

BIO：

Dr. Anping He is an assistant professor in School of information science and Engineering, Lanzhou University, China. In 2004, he became a master student and began to study the formal methods and develop EDA tools in Chinese Academy of Sciences, what he knew is synchronous circuit. In 2010, the third year of his PHD degree, he accessed and studied the asynchronous circuit system from ARC while he visited Portland State University, USA. Since then, he works with ARC for timing analysis and validation of asynchronous system in which the data is bunded by C-element, Click and GasP. Since 2014, he built an LZU-ARC team in Lanzhou University and began to design real asynchronous circuit with ARC’s help. Now his team has developed RSA system, Mesh NoC, Crossbar NoC, fixed-point and float point components and so on, all of which are successfully worked in Xilinx commercial FPGAs in an asynchronous way. He now focuses on asynchronous CNN and SNN chip, and the synchronous coevolutionary accelerator for testing has been down now.

 

Articles：

[1] Hoon Park*, Anping He, Marly Roncken and Xiaoyu Song. Semi-modular delay model revisited in context of relative timing. Electronics Letter, 51(4), 332-334, 2015.

[2] Hoon Park, Anping He*, Marly Roncken, Xiaoyu Song and Ivan Sutherland. Modular Timing Constraints for Delay-Insensitive Systems. Journal of Computer Science and Technology。 January 2016, Volume 31, Issue 1, pp 77-106

[3] Anping He, Xu Han, Tiantian Duan, Han Wu, Ning Zhou, Rong Liu, Xinyan Gao. Fast Fingerprint Recognition Solution Based on Neuron Chip Engine. Journal of Information and Computational Science. Vol. 12 (18) : 6685- 6692, 2015.//X

[4] Z. Chen, J. Wu, H. Guo, J. Xiong and A. He, A FPGA based SAT solver with random variable selection, 2016 International Conference on Integrated Circuits and Microsystems (ICICM), Chengdu, 2016, pp. 329-333. //X

[5] Liu X, He A, Li C, et al. Study of 64-bit booth asynchronous multiplier based on FPGA[C]// IEEE, International Conference on Asic. IEEE, 2018:263-266.

[6] Jia T, Li C, He A. Modeling and Verification of Circuit with Stable-Event[C]// International Conference on Cyber-Enabled Distributed Computing and Knowledge Discovery. 2017:471-475.

[7] Zuo Y, He A, Li C, et al. An innovation tool-chain for synthesis and implementation of Xilinx FPGA devices[C]// IEEE International Conference on Integrated Circuits and Microsystems. IEEE, 2017:124-127.

[8] Ma C, He A, Jia T, et al. Security Path Checking of A Circuit with Behavior Description[C]// Information Science and Cloud Computing. 2018:046.

[9] Guo H, Feng G, He A, et al. An innovative implementation of asynchronous for-loop circuit with click micropipeline[C]// IEEE International Conference on Integrated Circuits and Microsystems. IEEE, 2017:68-73.

[10] Liu Y, Chen H, Wang D, He A, et al. An asynchronous loop structure based on the click element[C]// International Conference on Electron Devices and Solid-State Circuits. 2017:1-2.

[11] Roncken, M., Sutherland, I., Chen, C., Yong, H., Hunt, W., Chau, C., Anping He, Hong Chen. (2017). How to think about self-timed systems. Asilomar Conference on Signals, Systems, and Computers (pp.1597-1604).

[12] Anping He, Jilin Zhang, et al. Asynchronous RSA Circuit with Click. (ASYNC2018, demo)

[13]Jilin Zhang, Anping He, Hong Chen. et al. From Click Based Asynchronous Design to Xilinx FPGA. (ASYNC2018, fresh idea)

[14] Lvying Yu, Yi Zuo, Caihong Li, Anping He, A DPLL-based High-Concurrent SAT Solver with FPGA, 2017 the 2nd International Conference on Computer Engineering, Information Science and Internet Technology.

[15] Anping He, Lvying Yu, Haitao Zhang, Jinzhao Wu, Lian Li. A FPGA based SAT Solver with High Random and Concurrent Strategies.(QRS2018)//（CCF C类）

[16] Anping He, Guangbo Feng, Jilin Zhang, et al. Click-Based Asynchronous Mesh Network with Bounded Bundled Data. (ICPP2018) // （CCF B类）

[17] Feiyang Yu, Guangbo Feng, Juxia Xiong, Jinzhao Wu, Jinlan Wang, Anping He. An Asynchronous Pipeline based Implementation of Membrane Potential of I&F model. (EDSSC 2018)

[18] Marly Roncken, Chris Cowan, Ben Massey, Swetha Mettala Gilla, Hoon Park, Robert Daasch, Anping He, Yong Hei, Warren Hunt Jr., Xiaoyu Song, and Ivan Sutherland. Beyond Carrying Coal To Newcastle: Dual Citizen Circuits. This Asynchronous World --- Essays dedicated to Alex Yakovlev on the occasion of his 60th birthday, Newcastle University Publisher, ISBN: 978-0-7017-0257-1.

 

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